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esercizi

Politecnico di Torino ingegneria informatica 2020
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  • General Scope: The document presents several exercises focusing on the analysis of MOS transistor circuits, covering DC biasing and small-signal AC behavior for various configurations.
  • Exercise 3 (pag. 51) - Common Drain (Source Follower):
    • **DC Analysis**: Systematically calculates the quiescent point (VG, VS, ID, VGS) by setting Vin=0 and verifies the saturation condition (VDS > VGS - VTH).
    • **Small-Signal Analysis**: Determines key small-signal parameters, including transconductance (gm = 2mS) and output conductance (go=0 for λ=0). It then derives the small-signal equivalent circuit.
    • **Voltage Gain (Av)**: Calculates the voltage gain as Av = gmR / (1 + gmR) ≈ 0.98, indicating a buffer-like behavior.
    • **Output Resistance (Rout)**: Computes Rout = R / (1 + gmR) ≈ 490 Ω.
    • **Output Voltage**: Derives the total output voltage, combining DC and AC components: VOUT = VOUT (DC) + vout (AC) = 2.5 + 0.98 sin(2πfot).
  • Exercise 5 (pag. 53) - Common Drain (Source Follower) with Current Source:
    • **DC Analysis**: Identifies ID from the current source, then calculates VGS and VDS, confirming saturation. Determines VOUT (DC).
    • **Small-Signal Analysis**: Finds gm (2mS) and go=0.
    • **Voltage Gain (Av)**: For an open-circuit output and infinite R, Av approaches 1, characteristic of a voltage follower.
    • **Output Resistance (Rout)**: Calculates Rout = 1/gm = 500 Ω.
  • Exercise 1 (pag. 49) - Common Source with Capacitor:
    • **DC Analysis**: Calculates VDS and VGS - VTH, verifying that the MOS operates in saturation.
    • **Small-Signal Parameters**: Determines gm (1.6mS) and go (80 nS, non-zero due to λ=0.01V^-1).
    • **AC Analysis**: Derives the output impedance Zout(s) and voltage gain Av(s), incorporating the load capacitor C.
    • **Frequency Response**: Calculates the in-band gain (Avo = -gmRout = -39.2) and the pole frequency (fp = 64.6 kHz).
    • **Bode Diagram**: Illustrates the magnitude (32 dB, -20dB/dec slope) and phase (initial 180°, -45° at fp, final 90°) plots, highlighting the inverting nature of the amplifier.
  • Exercise 4 (pag. 52) - Common Source with Input Divider and Capacitor:
    • **DC Analysis**: Calculates VGS using a voltage divider, then ID and VDS, confirming saturation.
    • **Small-Signal Parameters**: Determines gm (0.2mS) and go=0.
    • **AC Analysis (Adinamic Limit)**: Calculates Av in the absence of C, Av = -gmR * (R1||R2) / (R + R1||R2) = -4.128.
    • **AC Analysis (Dynamic)**: Introduces an input capacitor C, deriving the transfer function Av(s) as a high-pass filter.
    • **Frequency Response**: Calculates the pole frequency (fp = 0.058 Hz), indicating that the adynamic limit is valid for most significant frequencies.
  • Exercise 2 (pag. 50) - pMOS Common Source:
    • **DC Analysis**: For a pMOS, given current ID, calculates VSG - VTH and VDS, confirming saturation.
    • **Small-Signal Parameters**: Determines gm (0.4mS) and go=0.
    • **AC Analysis**: Derives the relationship for vsg and Vout.
    • **Voltage Gain (Av)**: Av = -R1 * gm / (1 + gmR2) = -8.
    • **Input/Output Resistance**: Rin is infinite, Rout is R1.
  • The document systematically analyzes different MOS amplifier configurations, emphasizing the step-by-step process for DC biasing, small-signal model derivation, and frequency response, which are fundamental for electronic circuit design.

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